FIG. 1 illustrates a video display containing 40 rows of 48 pixels each. (Actual displays used in computers are much larger. In 1993, 480 rows.times.640 columns is a common size.) Every pixel is associated with a memory location, or cell, in VIDEO RAM. (RAM is an acronym for Random Access Memory.)
For simplicity, it is assumed that each VIDEO RAM cell contains one bit. When the bit is a ONE, the corresponding pixel is dark; when the bit is a ZERO, the corresponding pixel is light. A video controller, known in the art, converts the bits stored in VIDEO RAM into bright and dark pixels.
(In actuality, more than a single bit is stored for each pixel, because the bits must indicate each pixel's color and intensity, not merely whether the pixel is dark or light.)
FIG. 2 illustrates the correspondence between the VIDEO RAM locations and the pixels. The pixels in a given row are grouped into groups of eight bits. Each eight-bit group is stored as a byte of data in VIDEO RAM. Group 1 in row 1 is stored as the byte at VIDEO RAM address 1. Group 2 in row 1 is stored as the byte at VIDEO RAM address 2, and so on.
This leads to a very important point, namely, that the bytes for a given row are located at adjacent addresses in VIDEO RAM. For example, the bytes for ROW 1 are located at addresses 1 through 6; for ROW 2, at addresses 7 through 12, and so on.